IP Portfolio

Complete GPU IP Capability System Glenfly has built a complete IP portfolio spanning 3D Graphics, 2D, GPGPU, matrix computing, video encoding/decoding and post-processing, display processing (PHY & Controller), Network-on-Chip (NoC), and data compression. It provides core capabilities for graphics rendering, general-purpose computing, AI acceleration, video processing, display output, and SoC integration.

Flexible integration for different systems Each IP can be deployed independently, or flexibly combined and integrated into a unified solution according to chip architecture, product form and application scenario, helping customers achieve efficient adaptation, rapid integration and differentiated design across different chip platforms.

Architecture-level collaborative optimization Built on an in-house, controllable underlying hardware architecture together with system scheduling and resource-management capabilities, Glenfly unifies data formats, layout specifications and communication protocols within its IP system and integrates consistent compression mechanisms and security policies. Through architecture-level collaborative optimization, data flow, communication paths and resource scheduling among IPs are efficiently connected, continuously improving bandwidth utilization and data-exchange efficiency at the system level while reducing runtime overhead and integration complexity.

Leveraging continuously evolving software-hardware co-design, Glenfly provides customers with customized IP and scalable chip-level solutions, helping products achieve a better balance across key metrics such as performance, power and area.

Configurable DPU & PHY IP

Display Interface · Content Protection · Multi-screen Output · Low Power · PHY Interface

A configurable DPU IP platform for display output and transmission, integrating mainstream display interfaces, content protection, low-power technologies and PHY interface IP; supports multi-screen, multi-layer, HD high-refresh and low-latency transmission, helping customers achieve rapid mass production and system integration.

Multi-screen multi-layer output

1–4 screens with multi-layer overlay per screen
Supports high resolution and high refresh rate

Applications

HD display devices
Multimedia processing chips
Video output / receive scenarios
Cloud gaming · cloud desktop · conferencing

Low-power technologies

PSR · PSR2 · VRR
Energy-saving optimization

PHY interface IP

DP · HDMI Tx
MIPI D-PHY · C-PHY Rx

Output topology

DPU Display Pipeline output topology

Multi-objective optimization

(Power · area · latency)

Pareto Front

Seeking the optimal balance among power, area and latency to meet the design needs of different scenarios.

Key performance

(Configurable)

Max resolution

8192X4320

@6OHz

Output devices

1, 2, 3 or 4

Layers per output

1, 2, 3 or 4

Low-power technologies

(Configurable)


PSR · PSR2 · VRR

Display interfaces

(Configurable)

DP · eDP1.4

CTS certification assistance

HDMI 2.1

CTS certification assistance

CRT (VGA)

Legacy monitor support

USB Type-C

DP Alt Mode support

Input data formats

(Configurable)

  • VGA modes
  • RGB8
  • RGB565
  • YCbCr422/8bpc
  • AYCbCr8888
  • ARGB8888
  • ARGB2101010
  • YCbCr422/10bpc
  • AYCbCr2101010
  • FP16
  • NV12L/8bpc
  • NV12L/10bpc

Content protection

HDCP 1.4 · HDCP 2.3

CTS certification assistance

Display Stream
Compression (DSC)

On · Off

Other functions

(Configurable)

Memory data decompression
Page Table
HDR
CSC
Upscaling
Writeback